The SMBus clock is defined from 10–100 kHz while I☬ can be 0–100 kHz, 0–400 kHz, 0–1 MHz and 0–3.4 MHz, depending on the mode. SMBus ‘high power’ devices and I☬-bus devices will work together if the pull-up resistor is sized for 3 mA. The main difference is the current sink capability with V OL = 0.4 V. NXP devices have a higher power set of electrical characteristics than SMBus 1.0. SMBus 2.0 defines a ‘High Power’ class that includes a 4 mA sink current that cannot be driven by I☬ chips unless the pull-up resistor is sized to I☬-bus levels. SMBus 3.0 supports V DD ranging from 1.8 to 5 V. SMBus 2.0 supports V DD ranging from 3 to 5 V.
Instead of relating the bus input levels to V DD, SMBus defines them to be fixed at 0.8 and 2.1 V. When mixing devices, the I☬ specification defines the input levels to be 30% and 70% of the supply voltage V DD, : 9 which may be 5 V, 3.3 V, or some other value. Electrical Input Voltage ( V IL and V IH) While SMBus is derived from I☬, there are several major differences between the specifications of the two busses in the areas of electricals, timing, protocols and operating modes. SMBus has grown into a wide variety of system enumeration use cases other than power management.
#WHAT IS A SM BUS CONTROLLER HP SERIAL#
SMBus is used to access DRAM configuration information as part of serial presence detect. SMBus is used as an interconnect in several platform management standards including: ASF, DASH, IPMI. (PMBus extends this to 400 kHz.) Its voltage levels and timings are more strictly defined than those of I☬, but devices belonging to the two systems are often successfully mixed on the same bus. Its clock frequency range is 10 kHz to 100 kHz. It carries clock, data, and instructions and is based on Philips' I☬ serial bus protocol. The SMBus was defined by Intel and Duracell in 1994.
Although SMBus devices usually can't identify their functionality, a new PMBus coalition has extended SMBus to include conventions allowing that. The SMBus is generally not user configurable or accessible. PCI add-in cards may connect to an SMBus segment.Ī device can provide manufacturer information, indicate its model/part number, save its state for a suspend event, report different types of errors, accept control parameters and return status. Other devices might include temperature, fan or voltage sensors, lid switches, clock generator, and RGB lighting.
It is derived from I☬ for communication with low-bandwidth devices on a motherboard, especially power related chips such as a laptop's rechargeable battery subsystem (see Smart Battery System). Most commonly it is found in computer motherboards for communication with the power source for ON/OFF instructions. The System Management Bus (abbreviated to SMBus or SMB) is a single-ended simple two-wire bus for the purpose of lightweight communication.